1. Technical Field
The present invention relates to a method for manufacturing a semiconductor device, and particularly relates to a method for manufacturing a semiconductor device having an interconnect structure that includes a titanium nitride (TiN) film provided on interconnects.
2. Related Art
In recent years, under the circumstances of an enhanced integration and an enhanced processing rate for a semiconductor device, reductions in an interconnect resistance and/or an interconnect capacitance are required. In addition, in a semiconductor device having a multiple-layered interconnect structure, aluminum, copper or the like are employed for an interconnect material, and in this case, a barrier metal layer is provided for the purpose of preventing these metals from diffusing into the insulating film.
Japanese Patent Laid-Open No. 2003-282,571 discloses a technology, in which an interlayer insulating film is formed on a surface of a metal nitride film that will be utilized as a barrier metal layer during the formation of via holes for providing electric couplings to interconnects in a semiconductor device, and then a reactive ion etching (RIE) process is conducted through a predetermined patterned mask to form the via holes, thereby partially exposing the metal nitride film that forms bottoms of the vias, and after stripping the patterned mask, a processing with a plasma of a gas containing nitrogen is carried out.
In Japanese Patent Laid-Open No. H08-213,366, an etching technology related to a removal of a side film in a process for forming multiple-layered interconnects for creating a via hole is disclosed.
Meanwhile, an altered layer composed of deposits of fluorocarbon films, oxides of the exposed portion of such metal nitride films or the like may be often formed on the surface of the metal nitride film of the via bottom.
If such altered layer is formed on the exposed portion of the metal nitride film on the via bottom, a via formed by filling the via hole with, for example, tungsten may exhibit an increased electric resistance (via resistance) when the via is energized, thereby causing a problem of deteriorating a reliability of the semiconductor device.